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rej03d0844-0201 rev.2.01 nov 14, 2007 page 1 of 10 M62215FP general purpose multifunction dc/dc converter rej03d0844-0201 rev.2.01 nov 14, 2007 description this ic is designed as general purpose multi-function dc/dc converter and is optimum also for back-light control for lcd. small 10-pin package containing many functions simplifies peripheral circuits and set design. priority control circuit contained in 2 channel input allows for simpler control when back-light is on and during the stable state. features ? wide operating voltage range: 8.6 to 25 v ? high precision reference voltage: 5 v 1% ? 2 channel priority control operation ("high" input prioritized) ? high speed switching operation (500 khz) ? output short-circuit protection circuit, on/off control, dead time control, soft start operation. ? small size 10-pin sop package ? high speed pulse-by-pulse current limit ? totem-pole output stage output current i o (peak): 1 a application back-light control for general electronic products such as personal computers, word processors, and portable equipments. block diagram + ? + ? + + ? v cc fb scp (soft) gnd cosc v ref op amp2 uvlo v th : 8.6 v pwm comp in2 op amp1 in1 vref out r s clm (pulse by pulse) 1.25 v 0.2 v vref 5 v osc. ckt. short-circuit protection circuit
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 2 of 10 pin arrangement preliminary: some limits are subject to change 1 2 3 4 5 10 9 8 7 6 out gnd vref scp cosc v cc clm fb in1 in2 M62215FP (top view) outline: prsp0010db-a (10p2n)
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 3 of 10 absolute maximum ratings (ta = 25 c, unless otherwise specified) item symbol ratings units conditions supply voltage v cc 26 v output voltage v o 26 v 150 ma continuous output current i o 1.0 a peak power dissipation pd 440 mw thermal derating k 4.4 mw/ c operating temperature topr ? 20 to +85 c storage temperature tstg ? 40 to +150 c electrical characteristics (ta = 25 c, v cc = 12 v, c osc = 390 pf, i ref = ? 5 ma, unless otherwise specified) limits block item symbol min typ max units test condition supply voltage range v cc vthon ? 25 v all circuit current i cc st 7.5 9.5 12.5 ma i ref = no load reference voltage v ref 4.95 5.00 5.05 v max. reference current i ref ? 10 ? ? ma ref. voltage block line regulation line 0.0 2.5 12.0 mv v cc = 8.6 to 15 v input bias current ib ? 500 ? ? na vin1 = 1 v, vin2 = 1 v open loop gain av ? 70 ? db gain-bandwidth product gb ? ? 0.6 mhz max. output voltage+ vom+ 4.75 4.97 5.25 v max. output voltage ? vom ? 0 280 400 mv output sink current lom+ 3.9 5.5 20.0 ma vfb = 2.5 v output source current iom ? ? 1.5 ? 1.1 ? 0.8 ma vin1 = 1 v, vin2 = 1 v error amp. block reference voltage of amp v ra 1.225 1.250 1.275 v oscillation frequency f osc 73 105 137 khz osc. upper limit voltage vosch 3.255 3.500 3.745 v osc. block osc. lower limit voltage voscl 1.395 1.500 1.605 v on threshold voltage vth on 7.998 8.600 9.202 v off threshold voltage vth off 7.068 7.600 8.132 v uvlo block hysteresis vhys 0.8 1.0 1.2 mv vhys = vthon ? vthoff scp threshold voltage vth scp 4.75 5.00 5.25 v vin1 = 1 v, vin2 = 1 v scp term. output current i scpout ? 26 ? 20 ? 14 a short circuit protect. block fb threshold voltage vth fb 3.99 4.20 4.41 v maximum on duty dutymax 85 90 95 % vol1 0.00 0.05 0.40 v v cc = 12 v, i o = 10 ma output low voltage vol2 0.00 0.80 1.40 v v cc = 12 v, i o = 100 ma voh1 10.0 10.5 12.0 v v cc = 12 v, i o = ? 10 ma output output high voltage voh2 9.5 10.0 12.0 v v cc = 12 v, i o = ? 100 ma clm threshold voltage vthclm 180 200 220 mv clm flow-out current ioutclm ? 290 ? 225 ? 150 a clm clm delay time tpdclm ? 100 ? ns delay time to out terminal
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 4 of 10 application circuit + + ? + ? + ? dc/ac c f1 c f2 c osc c i r1 v cc load in1 in2 v cc fb scp (soft) gnd cosc v ref op amp2 uvlo vthon: 8.6 v (typ) vthoff: 7.6 v (typ) pwm comp osc circuit op amp1 vref out 0.2 v short circuit protection circuit r s ref.volt source 5 v clm r f1 r f2 c 2 r6 r5 c 3 point a point b c f3 c f4 v ra c soft r clm d 1 r4 c delay c fl r fl d 2 r3 d 3 c 4 r2 + r i1 r i2 + + figure 1 application circuit example point a point b osc. lower limit voltage osc. uppe r limit voltage osc fb figure 2 voltage waveform
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 5 of 10 1. priority function as far as op amp1 and op amp2 are concerned, there is no pr oblem when either in1 or in2 is used to control current, since the setting up to lower the output voltage of the dc/dc converter is prioritized. 1) in the application circuit in figure 3, v o 1 is set to 24 v and v o 2 is set to 15 v for each output voltage. when sw is turned off, output voltage is feed backed to in1 with r1 and r2. output voltage v o is calculated with the following equation, v o = v ra (r1 + r2) / r2 (v ra = 1.25 v typ.) and v o 1 set to 24 v. if sw is turned on, this ic controls with priority to lowe r the output voltage, so output voltage is feed backed to in2 with r3 and r4. output voltage v o is calculated with the following equation, v o = v ra (r3 + r4) / r4 (v ra = 1.25 v typ.) and v o 2 set to 15 v. + + ? + ? + ? c osc c 1 v cc (12 v) in1 in2 v cc fb scp (soft) gnd cosc v ref op amp2 uvlo vthon: 8.6 v vthoff: 7.6 v pwm comp osc. circuit op amp1 vref out 0.2 v short-circuit protection circuit r s ref.volt source 5 v clm v o 1 = 24 v v ra r clm d 1 v o 2 = 15 v + + + r4 r2 r1 r3 switch figure 3 application circuit example
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 6 of 10 2. soft start function, maximum on duty setting and short-circuit protection 1) soft start function (refer to figure 4 for its application circuit) when power supply is turned on, fb terminal is fixed to high level since in1, in2 are on gnd level. voltage level of scp terminal gradually rises up from 0 v, because the internal charge current and the current flowing from the resistors dividing vref are charged to c scp . when scp terminal voltage reaches to the lower limit volta ge of triangular waveform, output starts to operate making dc/dc converter output voltage v o rise up. soft start time is calculated by the following equation, (internal charge current is designed as approx. 20 a) vscp = (r1 + r2) 5 ? r2 + 20 a ? r1 ? r2 ? (r1 + r2) 5 ? r2 + 20 a ? r1 ? r2 ? e ? t c ? r1 ? r2 (r1 + r2) note: vscp in this case is the voltage when output starts to operate. (equal to lower limit voltage of triangular waveform) vref scp (soft) r1 r2 c scp figure 4 soft start time on fb osc 0 v off drain volt age of ext ernal mosfet scp 1.5 v 3.5 v figure 5
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 7 of 10 2) setting for maximum on duty maximum on duty is set by the voltage applied to scp terminal, and this is the divided voltage of vref by resistors. the internal circuit of scp terminal has discharge circuit working before start-up and during output latch period (output is off) in over current mode so that soft start never fails to work when restarting. scp terminal also works as timer latch setting at over current or when output is short-circuited, so the way of setting differs depending upon whether or not timer latch at over current is used. ? when timer latch is used in this case, charge current of scp terminal is set to approx. 20 a, r2 should be approx. 330 k ? or more. ? when timer latch is not used r2 should be approx. 180 k ? or less. 3) short-circuit protection it is timer latch system that is applied for short-circuit protection circuit, and timer latch time is set by the capacitance for soft start connected to scp terminal. short-circuit protection circuit is shown in figure 7 and the timing chart for each mode in figure 6. when power is turned on, fb terminal voltage is high (approx. 4.6 v), scp terminal voltage low. (gradually rising from 0 v) approximately 20 a current flows out to make the potential of scp terminal go to high with time constant set by resistors and capacitor connected to vref terminal. this 20 a current continues to flow out to scp terminal if fb terminal voltage is high and doesn?t go down to the control state. (fb terminal is 4.2 v or more) scp terminal voltage rises, by this 20 a charge current, from the divided voltage of vref by resistors. system starts up when fb terminal voltage goes down to under control state voltage (4.2v or less) before that of scp terminal goes to 5 v. when output is short-circuited, whether starts up or latched depends upon how long it takes for fb terminal voltage to go down to control state from high potential. (refer to mode [v], [vi] for details) there are two ways to go back to operation after latch to shut output off. either method can get the system to redstart by soft start. 1. turn v cc on again. 2. make fb terminal voltage 4.2 v or less for cancellation. timer time for short-circuit protection depends on the time constant shown below. vscp = (r1 + r2) 5 ? r2 + 20 a ? r1 ? r2 ? 20 a ? r1 ? r2 ? e ? t c ? r1 ? r2 (r1 + r2) note: this vscp means scp terminal " h " threshold voltage.
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 8 of 10 [operation description by mode] mode [i] ???? start-up the potential of fb terminal goes down to the control state before that of scp terminal goes to scp terminal " h " threshold voltage. (approx. 5 v) mode [ii]????over-current latch when the over current flows in the system and clm terminal voltage goes up to clm term. threshold voltage, approximately 20 a charge current flows out from scp term.. this charge current makes the potential of scp term. high. output will be off (latched) when the potential of scp term. reaches scp term. " h " threshold voltage. mode [iii] ????latch canceled restart the latch is canceled and the system is restarted when the potential of fb terminal is set lower than fb term. threshold voltage. more [iv]????over-current recovery the potential of scp term. goes up by over current. the output is not turned off, because the potential of fb terminal goes down to lower than its threshold voltage before that of scp term. reaches scp term. " h " threshold voltage and also the latch-state is canceled. mode [v] ????turning on the v cc again the mode in which v cc is again turned on. mode [vi]????start-up latch at the start-up, the output is turned off, because the potential of fb term. doesn?t go down to its threshold voltage due to output short-circuit before the potential of scp term. reaches scp " h " threshold voltage. + ? + ? + ? clm 200 mv fb 4.2 v 5 v tr1 scp r2 c scp r1 v ref v cc v cc sw1 20 a r r r s s s q q q out section high signal in fall rate of osc out section figure 6 schematic diagram of scp section
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 9 of 10 osc. lower limit voltage 5.0 scp tr1 base voltage fb active sw1 3.7 v i ii iii vi active iv v figure 7 scp timing chart 4) oscillation frequency oscillation frequency is set by capacitance connected to osc terminal. oscillating triangular waveform: charge time: discharge time = 9 : l oscillation frequency (f osc ) is given as: f osc 23.62 10 3 c + 9 10 ? 7 1
M62215FP rej03d0844-0201 rev.2.01 nov 14, 2007 page 10 of 10 package dimensions 1.42 1.12 b p a 1 h e y 0.1 e 1.27 c 0 8 l 0.3 0.5 0.7 0 0.1 0.2 a 2.1 7.82 8.12 8.42 a 2 1.8 e 5.6 5.7 5.8 d 6.7 6.8 6.9 reference symbol dimension in millimeters min nom max 0.35 0.4 0.5 0.18 0.2 0.25 p-sop10-5.7x6.8-1.27 0.2g mass[typ.] 10p2n-a prsp0010db-a renesas code jeita package code previous code y index mark 1 5 6 10 f *2 *1 *3 c a b p e d h e e detail f l a 1 a 2 include trim offset. dimension "*3" does not note) do not include mold flash. dimensions "*1" and "*2" 1. 2.
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